A novel architecture of the 3D stacked MRAM L2 Cache for CMPs
Guangyu Sun, Xiangyu Dong, et al.
HPCA 2009
We present an end-to-end simulation framework that is capable of simulating High-Performance Computing (HPC) systems with hundreds of thousands of interconnected processors. The tool applies discrete event simulation and is driven by real-world application traces. It provides a semantically correct replay of MPI application traces and maintains reasonable simulation details of both the processors in general and the interconnection network in particular. Among other things, it features several interconnection network topologies, flexible routing schemes, arbitrary application task placement, point-to-point statistics collection, and data visualization. With a few case studies, we demonstrate the usefulness of this tool for assisting high-level system design as well as for performance projection and application tuning of future HPC systems. © 2010 The Society for Modeling and Simulation International.
Guangyu Sun, Xiangyu Dong, et al.
HPCA 2009
Jian Li, Lixin Zhang, et al.
ICS 2009
Wolfgang E. Denzel, Jian Li, et al.
SIMUTOOLS 2008
Hamid Ahmadi, Wolfgang E. Denzel
IEEE Journal on Selected Areas in Communications