A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS
Jean-Olivier Plouchart, Mark A. Ferriss, et al.
CICC 2012
A 90-nm silicon-on-insulator (SOI) CMOS system on-chip integrates high-performance FETs with 243-GHz Ft, 208-GHz Fmax, 1.45-mS/μm gm, and sub 1.1-dB NFmin up to 26 GHz. Inductor Q of 20, VNCAP of 1.8-fF/μm2, varactor with a tuning range as high as 25, and a low-loss microstrip. Transmission lines were successfully integrated without extra masks and processing steps. SOI and its low parasitic junction capacitance enables this high level of performance and will expand the use of CMOS for millimeter-wave applications. © 2005 IEEE.
Jean-Olivier Plouchart, Mark A. Ferriss, et al.
CICC 2012
Bodhisatwa Sadhu, Arun Paidimarri, et al.
ISSCC 2022
Jean-Olivier Plouchart, Jonghae Kim, et al.
IEDM 2005
Jean-Olivier Plouchart, Noah Zamdmer, et al.
IBM J. Res. Dev