65nm Cu integration and interconnect reliability in low stress K=2.75 SiCOH

Abstract

A low tensile stress SiCOH dielectric with K=2.75 has been developed for implementation in the 2x and 4x fatwire levels for enhanced RC performance in the 65nm technology node. Integration challenges related to mechanical integrity and process-induced damage were successfully overcome. Yield and interconnect reliability metrics comparable to dense K=3 SiCOH have been achieved. Package deep thermal cycle showed sensitivity to assembly which is controllable though chip edge structural engineering. © 2006 IEEE.