3-D capacitance modeling of advanced multilayer interconnection technologies

Abstract

A recently developed 3-D capacitance calculator is used to achieve accurate values for dense multilevel VLSI interconnects embedded in both uniform and complex dielectric structures. Data are presented of total and crosstalk capacitances versus wire pitch, width, thickness, and level spacing. As the dielectric structure will vary considerably with process technology and metallurgy, impacts from a number of realistic possibilities are calculated. Leverage is provided by low-permittivity dielectrics, but often processes involve additional materials that may incur large penalties. Progress in capacitance and very high-speed waveform measurements for multilayer on-chip interconnects is outlined.