Yu Gyeong Kang, Masatoshi Ishii, et al.
Advanced Science
This work demonstrates the first fabricated nonvolatile TCAM using 2-transistor/2-resistive-storage (2T-2R) cells to achieve >10x smaller cell size than SRAM-based TCAMs at the same technology node. The test chip was designed and fabricated in IBM 90nm CMOS technology and mushroom phase-change memory (PCM) process. To ensure reliable search operation with such compact cells, two enabling techniques were developed and implemented in hardware: 1) two-bit encoding, and 2) a clocked self-referenced sensing scheme (CSRSS). The 1Mb chip demonstrates reliable low voltage search operation (VDDmin∼750mV) and a match delay of 1.9 ns under nominal operating conditions. © 2013 JSAP.
Yu Gyeong Kang, Masatoshi Ishii, et al.
Advanced Science
Robert Montoye, Wendy Belluomini, et al.
ISSCC 2003
Mark Ferriss, Alexander Rylyakov, et al.
VLSI Circuits 2013
Jing Li, Robert Montoye, et al.
VLSI Technology 2013